1. Field of the Invention
The present invention relates to a driver circuit, and more particularly, to a differential common mode logic driver with a switching control circuit.
2. Description of the Prior Art
Common mode logic (CML) drivers are usually adopted to provide a driving voltage from stage to stage. However, a conventional CML driver often suffers from problems such as incomplete transition from a cut-off region to a linear region of the inherent switching transistors and common mode voltage variation.
Please refer to FIG. 1, which is a diagram of a conventional CML driver 100. Two metal-oxide-semiconductor (MOS) transistors NA1 and NA2 serve as switching transistors to conduct currents IA1 and IA2 alternately according to a pair of input voltages VinA1 and VinA2. Usually, the input voltages VinA1 and VinA2 are paired differential signals. Therefore, when the input voltage VinA1 goes high, the MOS transistor NA1 enters a linear or saturation region and conducts the current IA1 equal to a common current IA; meanwhile, the input voltage VinA2 goes low and the MOS transistor NA2 enters a cut-off region and conducts no current at all (in an ideal case). However, the input voltage VinA1 may not be sufficient to drive the MOS transistor NA1 into the saturation region. Thus, the MOS transistor NA1 stays in the linear region rather than the saturation region, leading to a small output impedance of the CML driver and therefore a poor driving performance.
Additionally, the conventional CML driver 100 also suffers from another drawback in a practical operation. When the output signals of the conventional CML driver 100 encounter a transition (e.g., one of the output voltages goes from high to low while the other goes from low to high), a common mode voltage of the output signals may also vary with the transition. Consequently, electromagnetic interference (EMI) occurs, leading to a degradation in performance and the stability of the output signals.
Therefore, it is crucial to ensure a stable common mode voltage at the output terminals of a CML driver.